1. Field of the Invention
This invention relates to a multi-layer flexible printed circuit having a circuit section and a cable section that is connected to the circuit section, and a manufacturing method thereof. This invention particularly relates to countermeasures for preventing overflow of interlayer insulating resin in a multi-layer flexible printed circuit (hereinafter abbreviated as “multi-layer FPC”) in which layers are connected together by a conductive bump.
2. Description of the Related Art
A multi-layer circuit board is made by laminating a predetermined number of conductive layers of metal foil by using interlayer insulating resin. When laminating, it is necessary to allow the interlayer insulating resin a certain amount of flow, so as to bury it between the interlayer circuit patterns.
Consequently, in a multi-layer FPC whose cable section is made by using the inner layer of a circuit section, when laminating the outermost conductive layers and the interlayer insulating resin in a laminating press, the resin component used in the interlayer insulating resin overflows onto the inner layer cable section of the multi-layer FPC.
FIG. 10 depicts a state where the resin component has overflowed. In the cable-fitted multi-layer FPC, a cable 2 is extracted from an inner layer multi-layer board 1. The outer layer conductive layer 10 of the inner layer multi-layer board 1 is connected to the outermost layer conductive layer 11 of the multi-layer FPC by a bump for interlayer connection 12, and an interlayer insulating resin A is filled between the conductive layers. In this example, the interlayer insulating resin A flows along the cable 2, forming an extended section A′ from the side face of the inner layer multi-layer board 1 to the cable 2.
The extended section A′ of FIG. 10 is inconvenient, since it peels due to tearing caused by warping of the cable 2, appears unsightly when completed, and such like.
Countermeasures, such as those in Japanese Patent Application Laid-open No. 2002-141664, have been proposed to prevent the interlayer insulating resin A from overflowing. Here, part of a sheet adhesive inserted between board layers is thermally hardened to form a wall that prevents the resin component from overflowing.
Japanese Patent Application Laid-open No. 2001-326459 proposes another method for connecting layers of a circuit board, in which two conductive layers are connected by a conductive bump provided on one of them.
Since the method of Japanese Patent Application Laid-open No. 2002-141664 uses a hardened part of the resin itself as a wall to prevent overflow, a certain amount of flow and overflow of resin is unavoidable when heating during the laminating process. While a resist wall may be added to further suppress resin overflow, as described in Japanese Patent Application Laid-open No. 2002-141664, this requires an extra process and increases the cost.
Japanese Patent Application Laid-open No. 2001-326459 describes interlayer continuity using a conductive bump. In comparison with conventional methods of drilling an NC hole and making a hole by laser, this method achieves a high density of interlayer continuity at low cost. However, it gives no consideration to the overflow of interlayer insulating resin onto the cable section of the multi-layer FPC.